1. Field of the Invention
The present invention relates to a variable gain amplifying apparatus which can set predetermined gain for amplifying.
2. Description of the Related Art
A variable gain amplifying apparatus has a plurality of digital control type amplifying circuits. A valid gain of the variable gain amplifying apparatus is equal to a total of specific gains of digital control type amplifying circuits to be made active. If the variable gain amplifying apparatus is provided with analog control type amplifying circuits, the valid gain of the variable gain amplifying apparatus is equal to a gain set for the analog control type amplifying circuit.
FIG. 1 shows a configuration of a conventional variable gain amplifying apparatus. A variable gain amplifying apparatus (VGA) 3 shown in FIG. 1 has an input 301, an output 302, an n-bit controller 303 and first to n-th variable gain circuits 311 to 315.
The input 301 is connected to an input of the first variable gain circuit 311. An output of the first variable gain circuit 311 is connected to an input of the second variable gain circuit 312. An output of the second variable gain circuit 312 is connected to an input of the third variable gain circuit 313. Similarly, an output of the (n-1)-th variable gain circuit 314 is connected to an input of the n-th variable gain circuit 315. An output of the n-th variable gain circuit 315 is connected to the output 302. An output of the n-bit controller 303 is connected to control terminals of the first to n-th variable gain circuits 311 to 315.
The input 301 is a terminal to which an input signal is inputted. The first variable gain circuit 311 is composed of variable amplifiers in which the gain (0 db, 32 dB) are set in accordance with a control signal outputted by the n-bit controller 303. The second variable gain circuit 312 is composed of variable amplifiers in wihch the gain (0 dB, 16 dB) are set in accordance with the control signal outputted by the n-bit controller 303. The third variable gain circuit 313 is composed of variable amplifiers in wihch the gain (0 dB, 8 dB) are set in accordance with the control signal outputted by the n-bit controller 303. The (n-1)-th (fourth) variable gain circuit 314 is composed of variable amplifiers in wihch the gain (0 dB, 4 dB) are set in accordance with the control signal outputted by the n-bit controller 303. The n-th (fifth) variable gain circuit 315 is composed of variable amplifiers in wihch the gain (0 dB, 2 dB) are set in accordance with the control signal outputted by the n-bit controller 303. The output 302 is a terminal from which the amplification signal amplified by the first to n-th (fifth) amplifiers 311 to 315 is outputted. The n-bit controller 303 outputs an n-bit parallel signal to the first to n-th (fifth) variable amplifiers 311 to 315. In this case, the n-bit implies a five-bit, corresponding to the first n-th (fifth) variable amplifiers 311 to 315. The most significant bit of the n-bit is inputted to, for example, the first variable gain circuit 311. In this case, the least significant bit of the n-bit is inputted to the n-th (fifth) variable gain circuit 315. A variable gain circuit receiving a valid bit (a value of 1) is turned ON (the amplification of 32, 16, 8, 4 or 2 dB) . A variable gain circuit receiving an invalid bit (a value of 0) is turned OFF (the amplification of 0 dB). The gain of the variable gain amplifying apparatus 3 can be set to 0, 2, 4, . . . , or 32 db. By the way, the amplification degree of each variable gain circuit is not limited to the above-mentioned values. It may be set arbitrarily.
If the gain of the variable gain amplifying apparatus 3 is set to 2 dB, the n-bit controller 303 outputs a control signal (00001). In response to this control signal, the n-th (fifth) variable gain circuit 315 is turnedON (the gain of 2 dB), and the first to (n-1) (fourth) variable gain circuits 311 to 314 are turned OFF (the gain of 0 dB). If the gain of the variable gain amplifying apparatus 3 is set to 32 dB, the n-bit controller 303 outputs a control signal (11111). In response to this control signal, the first to n-th (fifth) variable amplifiers 311 to 315 are turned ON (the gain of 32+16+8+4+2 dB) . By the way, the control is not limited to the above-mentioned cases. It may be set arbitrarily.
If the amplifying circuits are connected in multiple stages, the total gain implies the total of the gains in the respective amplifying circuits. The values of the respective amplifying circuits are reflected in the total value of noise figures and distortion values.
FIGS. 2A, 2B show the characteristics of the variable gain amplifying apparatus. FIG. 2A shows the configuration to describe the performances of the variable gain amplifying apparatus 3 (FIG. 1), and FIG. 2B shows the performance parameters of the variable gain amplifying apparatus.
A variable gain amplifying apparatus 3 shown in FIG. 2A is provided with an input 301, an output 302 and first to n-th amplifying circuits 311 to 315.
An input 301 is connected to an input of the first amplifying circuit 311. An output of the first amplifying circuit 311 is connected to an input of the second amplifying circuit 312. An output of the second amplifying circuit 312 is connected to an input of the third amplifying circuit 313. Similarly, an output of the (n-1)-th amplifying circuit 314 is connected to an input of the n-th amplifying circuit 315. An output of the n-th amplifying circuit 315 is connected to the output 302.
The first amplifying circuit 311 has a gain G1. The second amplifying circuit 312 has a gain G2. The third amplifying circuit 313 has a gain G3. The (n-1) -th amplifying circuit 314 has a gain G(n-1). And, the n-th amplifying circuit 315 has a gain Gn. As for a noise figure NF, similarly, the first to n-th amplifying circuits have noise figures NF1 to NFn, respectively. As for a distortion IP3, similarly, the first to n-th amplifying circuits have distortions IP31 to IP32, respectively.
A total gain Gt (dB) of the variable gain circuit 3 (which is assumed to have three stages) is represented by the following equation 1: EQU Gt=G1+G2+G3+. . . +Gn
A total noise figure NFt (a true number) is represented by the following equation 2: EQU NFt=NF1+(NF2-1)/G1+(NF3-1)/(G1*G2)+. . . +(NFn-1)/(G1*G2*G3 . . . *G(n-1))
A total distortion IP3t (a true number) is represented by the following equation 3: EQU IP3t=1/(1/IP31+G1/IP32+G1*G2/IP33+G1*G2*G3* . . . *G(n-1)/IP3n)
As can be evident from the equation (2), if the noise figure NF1 of the first amplifying circuit is small and the gain G1 is large, the total noise figure NFt can be made smaller. On the other hand, the increase in the number of stages in the amplifying circuits causes the total noise figure NFt to be larger. In order to obtain a desirable total gain Gt, it is necessary that the amplifying circuit has a larger number of stages. In the conventional variable gain amplifying apparatus 3, it is difficult to drop the total noise figure NFt.
The amplifying circuits are coupled in series. Thus, it is necessary that even the amplifying circuit whose gain is set to 0 dB is always made active. In the conventional variable gain amplifying apparatus 3, it is difficult to drop a consumptive electric power.
The increase in the number of stages in the amplifying circuits constituting the variable gain amplifying apparatus causes the influence of the amplification characteristic of each amplifying circuit to be larger. The inaccurate setting of the gain of each amplifying circuit increases an error in the total gain Gp. The increase in the number of stages in the amplifying circuit constituting the variable gain amplifying apparatus and further the change in the total gain Gt vary an impedance of the amplifying circuit whose gain is changed. The variation in the impedance increases the error of the total gain Gp. The increase in the number of stages in the amplifying circuit constituting the variable gain amplifying apparatus reduces a phase margin of the variable gain amplifying apparatus to thereby deteriorate the phase characteristic thereof. The deterioration of the phase characteristic causes an abnormal oscillation.
The technique according to the variable gain amplifying apparatus is disclosed in Japanese Laid Open Patent Application (JP-A-H10-341122) and Japanese Laid Open Patent Application (JP-A-H11-27068). Those gazettes disclose the technique for attaining an improvement in a setting accuracy of a gain. However, those gazettes do not disclose the decrease in the number of stages in the variable gain circuit and the effect associated with the decrease in the number of stages at all.